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#ifndef DT_BINDINGS_MEMORY_TEGRA210_MC_H #define DT_BINDINGS_MEMORY_TEGRA210_MC_H #define TEGRA_SWGROUP_PTC 0 #define TEGRA_SWGROUP_DC 1 #define TEGRA_SWGROUP_DCB 2 #define TEGRA_SWGROUP_AFI 3 #define TEGRA_SWGROUP_AVPC 4 #define TEGRA_SWGROUP_HDA 5 #define TEGRA_SWGROUP_HC 6 #define TEGRA_SWGROUP_NVENC 7 #define TEGRA_SWGROUP_PPCS 8 #define TEGRA_SWGROUP_SATA 9 #define TEGRA_SWGROUP_MPCORE 10 #define TEGRA_SWGROUP_ISP2 11 #define TEGRA_SWGROUP_XUSB_HOST 12 #define TEGRA_SWGROUP_XUSB_DEV 13 #define TEGRA_SWGROUP_ISP2B 14 #define TEGRA_SWGROUP_TSEC 15 #define TEGRA_SWGROUP_A9AVP 16 #define TEGRA_SWGROUP_GPU 17 #define TEGRA_SWGROUP_SDMMC1A 18 #define TEGRA_SWGROUP_SDMMC2A 19 #define TEGRA_SWGROUP_SDMMC3A 20 #define TEGRA_SWGROUP_SDMMC4A 21 #define TEGRA_SWGROUP_VIC 22 #define TEGRA_SWGROUP_VI 23 #define TEGRA_SWGROUP_NVDEC 24 #define TEGRA_SWGROUP_APE 25 #define TEGRA_SWGROUP_NVJPG 26 #define TEGRA_SWGROUP_SE 27 #define TEGRA_SWGROUP_AXIAP 28 #define TEGRA_SWGROUP_ETR 29 #define TEGRA_SWGROUP_TSECB 30 #endif